Many microdevices, such as integrated circuits, have become so complex that these devices cannot be manually designed. For example, even a simple microprocessor may have millions and millions of transistors that cooperate to form the components of the microprocessor. As a result, electronic design automation tools have been created to assist circuit designers in analyzing a circuit design before it is manufactured. These electronic design automation tools typically will execute one or more electronic design automation (EDA) processes to verify that the circuit design complies with specified requirements, identify problems in the design, modify the circuit design to improve its manufacturability, or some combination thereof. For example, some electronic design automation tools may provide one or more processes for simulating the operation of a circuit manufactured from a circuit design to verify that the design will provides the desired functionality. Still other electronic design automation tools may alternately or additionally provide one or more processes for confirming that a circuit design matches the intended circuit schematic, for identifying portions of a circuit design that do not comply with preferred design conventions, for identifying flaws or other weaknesses the design, or for modifying the circuit design to address any of these issues. Examples of electronic design automation tools include the Calibre family of software tools available from Mentor Graphics Corporation of Wilsonville, Oreg.
As electronic design automation tools continue to develop, greater sophistication is being demanded from these tools. For example, in addition to detecting obvious design flaws, many electronic design automation tools are now expected to identify those design objects in a design that have a significant likelihood of being improperly formed during the manufacturing process, determine the resultant impact on manufacturing yield that these design objects will create, and/or identify design changes that will allow the design objects to be more reliably manufactured during the manufacturing process (e.g., “design-for-manufacture” (DFM)). In order to meet these expectations, a process executed by an electronic design automation tool may need to perform more calculations than with previous generations of electronic design automation tools. For example, a design rule check process may confirm that the polygons used in a physical layout design to form individual wiring lines are separated by a minimum specified distance. In addition, however, the design rule check process also may determine the likelihood that the polygons may nonetheless form the wiring lines with an erroneous bridging fault. This determination may require, for example, calculating the distance between the polygons, the length for which the polygons run adjacent to each other, and the thickness of the polygons at their adjacent portions.
As process nodes are becoming smaller, foundries are requiring or performing more voltage-related checks for layout design data. For example, a foundry may determine that a given spacing between geometric elements is acceptable when the geometric elements are associated with a relatively small voltage drop. If, however, the geometric elements are associated with a relatively large voltage difference, then the foundry may deem that the same spacing between the geometric elements is too small, and must be changed.
To facilitate this type of voltage-related analysis, a designer will typically add voltage markers to layout design data. These markers associate a specific geometric element in the layout design data with a particular voltage. With some automated design tools, such as the Calibre® family of physical verification tools available from Mentor Graphics Corporation of Wilsonville, Oreg., a voltage marker can be implemented by a geometric element positioned to overlap (and thus be associated with) the geometric element for which the voltage is being specified. The specified voltage value can then attached to the marker as a “property” value, as described in detail in U.S. patent application Ser. No. 11/869,731 entitled “Properties In Electronic Design Automation,” filed on Oct. 9, 2007, and naming Fedor Pikus as inventor, which application is incorporated entirely herein by reference as well. In this manner, the specified voltage value is associated with a circuit geometric element through the marker geometric element.
When an electronic design automation tool initiates a check (such as a design rule check) to be performed on geometric elements associated with a specific voltage value or range of voltage values, the tool can identify relevant geometric elements by examining the voltage markers. For example, the tool can determine whether geometric elements in a net are associated with a voltage value or range of voltage values by examining all of the voltage markers for all of the geometric elements in the net. While this arrangement is helpful, it is also very time consuming and computationally expensive, since the tool must examine all of the voltage markers for all of the geometric elements in the net. Because even a single process executed by an electronic design automation tool may require millions of calculations, improvements in the speed and efficiency of electronic design automation tools are continuously being sought.